Special session: Physical attacks through the chip backside: Threats, challenges, and opportunities

AuthorAmini, E.; Bartels, K.; Boit, C.; Eggert, M.; Herfurth, N.; Kiyan, T.; Krachenfels, T.; Seifert, J.-P.; Tajik, S.
TypeConference Paper
AbstractThis paper reviews the evolution of a powerful class of physical attacks against integrated circuits (ICs), developed initially for performing failure analysis (FA) from the IC backside. Over the last two decades, several publications have demonstrated the effectiveness of these techniques in bypassing the IC protection schemes and extracting the stored assets inside secure ICs. In this work, we take a fresh look at such hardware attacks from three different perspectives. First, we will discuss the potential threat of the attacks against modern technologies and demystify a set of wrong beliefs about the attacks' complexity. Second, we review some technical challenges of such attacks from a law enforcement agency's perspective for unraveling crimes and preventing further crimes by criminals involved. Finally, we give an insight into the future development of FA tools and the opportunities for designing effective countermeasures against attacks through the chip backside.
ConferenceVLSI Test Symposium (VTS) <39, 2021, Online>
PartInstitute of Electrical and Electronics Engineers -IEEE-: IEEE 39th VLSI Test Symposium, VTS 2021. Proceedings: April 26th - 28th, 2021, Virtual Interactive Live Event. Piscataway, NJ: IEEE, 2021, pp. 188-199
PartnISBN : 9781665419499